OTN Mapper Solutions on FPGAs

Leveraging Cost-Optimized FPGAs to Deliver OTN Mapper Solutions

Carriers around the globe are planning how to transition their existing telecommunications transport infrastructure from traditional SONET/SDH to a more cost-per-bit effective transport technology. The main drivers for this transition are the increased demand for bandwidth as well as the need to lower the cost per bit.Carriers around the globe are planning how to transition their existing telecommunications transport infrastructure
from traditional SONET/SDH to a more cost-per-bit effective transport technology. The main drivers for this transition are the increased demand for bandwidth as well as the need to lower the cost per bit.

This dilemma forces carriers to consider new and more cost-effective transport equipment than traditional SONET/SDH systems, especially for aggregation networks that aggregate data traffic from large amounts of users for onward transport in the core networks.
In some of these new transport systems, Optical Transport Network (OTN) replaces SONET/SDH as the transport protocol, and Gigabit Ethernet (GbE) replaces PDH E1/T1 (2 Mbps/1.5 Mbps) as the preferred access point into the aggregation network.

Products such as TPACK’s TPO124, based on Altera’s low-cost 40-nm Arria II GX FPGAs or HardCopy ASIC technology, allow innovative developers to offer flexible semiconductor products with lower cost and lower power than alternative solutions based on standard cell-based ASICs.

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